Error: Cannot place pin flash_addr[11] to location AF21
 Error: Can't place VREF pin AR19 (VREFGROUP_B7_N0) for pin flash_addr[11] of type output with 1.8 V I/O standard at location AF21
  Error: Too many output and bidirectional pins in I/O bank 7 assigned near VREF pin AR19 (VREFGROUP_B7_N0) on device EP2SGX90FF1508C3 -- no more than 20 output and bidirectional pins allowed near the VREF pin when voltage referenced pins are driving in, but there are potentially 21 pins driving out
   Info: Pin temp_i2c_clk of type output at location AV21 uses 1.8 V I/O standard
   Info: Pin mem_addr_from_the_ddr_mem[14] of type output at location AG19 uses SSTL-18 Class I I/O standard
   Info: Pin mem_clk_to_and_from_the_ddr_mem[0] of type bi-directional at location AW19 uses SSTL-18 Class I I/O standard
   Info: Pin mem_clk_to_and_from_the_ddr_mem[1] of type bi-directional at location AU20 uses SSTL-18 Class I I/O standard
   Info: Pin mem_clk_to_and_from_the_ddr_mem[2] of type bi-directional at location AP20 uses SSTL-18 Class I I/O standard
   Info: Pin mem_clk_n_to_and_from_the_ddr_mem[0] of type bi-directional at location AV19 uses SSTL-18 Class I I/O standard
   Info: Pin mem_clk_n_to_and_from_the_ddr_mem[1] of type bi-directional at location AT20 uses SSTL-18 Class I I/O standard
   Info: Pin mem_clk_n_to_and_from_the_ddr_mem[2] of type bi-directional at location AN20 uses SSTL-18 Class I I/O standard
   Info: Following pins have the same output enable group 1527189512
    Info: Pin mem_dm_from_the_ddr_mem[4] of type output at location AP18 uses SSTL-18 Class I I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[31] of type bi-directional at location AP17 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[32] of type bi-directional at location AW18 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[33] of type bi-directional at location AT18 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[34] of type bi-directional at location AW17 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[35] of type bi-directional at location AR18 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[36] of type bi-directional at location AN18 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[37] of type bi-directional at location AT19 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[38] of type bi-directional at location AU19 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dq_to_and_from_the_ddr_mem[39] of type bi-directional at location AN19 uses SSTL-18 Class II I/O standard
    Info: Pin mem_dqs_to_and_from_the_ddr_mem[4] of type bi-directional at location AV18 uses SSTL-18 Class II I/O standard
   Info: Following pins have the same output enable group 1
    Info: Pin temp_i2c_data of type bi-directional at location AU17 uses 1.8 V I/O standard
   Info: Following pins have the same output enable group 3
    Info: Pin flash_addr[2] of type output at location AU21 uses 1.8 V I/O standard
Error: Can't fit design in device
Error: Quartus II Fitter was unsuccessful. 4 errors, 4 warnings
 Error: Peak virtual memory: 547 megabytes
 Error: Processing ended: Sun Oct 02 19:40:16 2011
 Error: Elapsed time: 00:00:56
 Error: Total CPU time (on all processors): 00:00:43
Error: Quartus II Full Compilation was unsuccessful. 6 errors, 484 warnings