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Pasted as text by ReaperSMS ( 18 years ago )
module r232tx(rstn, txd, rts, bclk,
	      rdempty, rdreq, q);
   output reg txd;
   input  wire rstn;
   input  wire rts;
   input  wire bclk;
   input  wire rdempty;
   input  wire [7:0] q;
   output reg rdreq;
   reg [3:0] bitdel;
   reg [10:0] tbuf;
   wire       empty;

   assign    empty = |tbuf & rts;
   
   always @(posedge bclk)
     if (~rstn)
       begin
	  txd <= 1'b0;
	  tbuf <= 11'h7FF;
	  bitdel <= 4'h0;
	  rdreq <= 1'b0;
       end
     else
       begin
	  if (rdreq)
	    begin
	       rdreq <= 1'b0;
	       tbuf <= { 2'b10, q, 1'b1 };
	    end
	  else if (~rdempty & empty)
	    rdreq <= 1'b1;
	  if (~|bitdel[1:0])
	    begin
	       { txd, tbuf } <= { tbuf[10:0], 1'b0 };
	       bitdel <= 4'hF;
	    end
	  else
	    bitdel <= bitdel - 1;
       end
endmodule // r232tx

 

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