<Si235> I have a verilog module that was configured as a topLevel module, it initializes some states for the FPGA, is there a way I can load / use it initilize the FPGA before it goes to the schematic level?
--> teralaser (~teralaser@unaffiliated/teralaser) has joined ##fpga
<scrts2> You still don't understand what fpga is and how it works
<scrts2> You describe HARDWARE using particular language
<scrts2> either it is vhdl, verilog, schematic, etc
<scrts2> it is synthesized to logic gates, rams, wires, etc