----------------- Avalon-MM Master read side ----------------------
avm_memrd_read <= mem_read;
avm_memrd_address <= std_logic_vector(mem_read_addr);
avm_memrd_burstcount <= std_logic_vector(burstcount); -- constant burstcount: 0x5E packets
read_start <= '1' when (read_valid_counter = "000000" and avm_memrd_readdatavalid = '1' and avm_memrd_waitrequest = '0') else '0';
process(csi_clk_clk, csi_clk_reset,avm_memrd_readdatavalid,avm_memrd_waitrequest)
begin
if(rising_edge(csi_clk_clk)) then
case(read_state) is
when start =>
if(read_usedwr(8) = '0' and reset_wr_ptr = '0') then -- if read FIFO is half empty or pointer reset occurs...
if(mem_read_addr = endaddr) then
mem_read_addr <= startaddr;
else
mem_read_addr <= mem_read_addr + packetsize;
end if;
mem_read <= '1';
read_state <= begin_read;
else
read_state <= start;
end if;
when begin_read =>
if(avm_memrd_waitrequest = '0') then -- Wait until slave will be ready...
mem_read <= '0'; -- and deassert the read signal
read_state <= end_read;
else
read_state <= begin_read;
end if;
when end_read =>
if(read_counter = "101111000") then -- watchdog: for 3 lost packets in a row
read_counter <= (others => '0');
read_state <= start;
else
read_counter <= read_counter + 1;
end if;
if(avm_memrd_readdatavalid = '1') then
if(read_valid_counter = (burstcount - 1)) then -- Lets count valid packets
read_valid_counter <= (others => '0');
read_counter <= (others => '0');
read_state <= start;
else
read_valid_counter <= read_valid_counter + 1;
read_state <= end_read;
end if;
end if;
end case;
if(csi_clk_reset = '1' or reset_rd_ptr = '1') then
mem_read <= '0';
mem_read_addr <= (startaddr + X"0007FF70"); -- Let's start reading from the buffer middle
end if;
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